This application claims the benefit of U.S. Ser. No. 61/973,031, filed Mar. 31, 2014, entitled “Lithography Process And Composition With De-Crosslinkable Crosslink Material,” the entire disclosure of which is hereby incorporated herein by reference.
The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of IC processing and manufacturing. For these advances to be realized, similar developments in IC processing and manufacturing, such as lithography process, are needed. During a lithography process, etching is employed to remove one or more materials. However, the existing etch method will damage the substrate.
Therefore, a method of lithography process and a structure of a coating material utilized in the lithography process are desired to address the above issues.